MC9S08QG8CDTE DataSheet
DATASHEET
MC9S08QG8CDTE 描述
Providing two banks of four outputs, the PI6C2308A is a 3.3V zero- delay buffer designed to distribute clock signals in applications including PC, workstation, datacom, telecom, and high-performance systems. Each bank of four outputs can be controlled by the select inputs as shown in the Select Input Decoding Table.
MC9S08QG8CDTE 特点
Time t6, represents a transition between light and heavy load. A single energy pulse is not sufficient to force the output voltage above its upper threshold before the mini- mum off time has expired, and a second charge cycle is commanded. Since the inductor current does not reach zero in this case, the peak current is greater than 0.5A at the end of the next charge on time. The result is a ratcheting of inductor current until either the output volt- age is satisfied, or the converter reaches its programmed current limit. At time t7, the gate drive voltage has dropped below its threshold but the converter continues to service the output because it has highest priority, un- less VGD drops below 7.5V.
MC9S08QG8CDTE 应用
Technical/Catalog InformationMC9S08QG8CDTEVendorFreescale SemiconductorCategoryIntegrated Circuits (ICs) Program Memory Size
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描述
询价
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