MCIMX27VOP4A DataSheet
DATASHEET
MCIMX27VOP4A 描述
256K x 36, 512K x 18 memory configurations Supports fast access times: C 7.5ns up to 117MHz clock frequency C 8.0ns up to 100MHz clock frequency C 8.5ns up to 87MHz clock frequency LBO input selects interleaved or linear burst mode Self-timed write cycle with global write control (GW byte writeGW),GW enable (BWE and byte writes (BWBWE),BWx)BWEBW 3.3V core power supply Power down controlled by ZZ input 3.3V I/O supply (VDDQ) Packaged in a JEDEC Standard 100-pin thin plastic quad flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball grid array (fBGA).
MCIMX27VOP4A 特点
The MCIMX27VOP4A is a 12-bit, switched-capacitor, successive-approximation, analog-to-digital converter. The ADC has three control inputs [chip select (CS), the input-output clock, and the address/control input (DATAIN)], designed for communication with the serial port of a host processor or peripheral through a serial 3-state output.
MCIMX27VOP4A 应用
The CY2DL814 is ideal for both level translations from single ended to LVDS and/or for the distribution of LVDS-based clock signals. The Cypress CY2DL814 has configurable input and output functions. The input can be selectable for LVPECL/LVTTL or LVDS signals while the output drivers support standard and high drive LVDS. Drive either a 50-ohm or 100-ohm line with a single part number/device.
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